Node-level Coordinated Power-Performance Management

Pareto-optimal power-performance system configurations can improve performance for a power budget or reduce power for a performance target, both leading to energy savings. We develop a new power-performance management framework that seeks to operate at the pareto-optimal frontier for dynamically reconfigurable systems, focusing on singlenode reconfigurations in this paper. Our framework uses new power-performance state descriptors, Π-states, that improve upon the traditional ACPI-state descriptors by taking into account interactions among multiple reconfigurable components, quantifying system-wide impact and predicting totally ordered pareto-optimal states. We demonstrate applications of our framework for both simulated systems and real hardware. In simulation, we demonstrate (near-)optimal configurations in the presence of a number of reconfigurable options such as core frequency, LLC capacity, offchip bandwidth and memory frequency. On an existing Intel Haswell single-socket server machine, we achieve 48% (average) improvements in energy efficiency using only core frequency management.